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 INTEGRATED CIRCUITS
DATA SHEET
TDA8767 12-bit high-speed Analog-to-Digital Converter (ADC)
Preliminary specification Supersedes data of 1997 Jun 27 File under Integrated Circuits, IC02 1999 Feb 16
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
FEATURES * 12-bit resolution * Sampling rate up to 30 MHz * -3 dB bandwidth of 18 MHz * No missing codes guaranteed * 5 V power supplies * Binary or two's complement CMOS outputs * In-range CMOS output * TTL/CMOS compatible static digital inputs * 3 to 5 V CMOS digital outputs * TTL compatible clock input * Power dissipation 335 mW (typ.) * Low analog input capacitance (typ. 2 pF), no buffer amplifier required * No external sample-and-hold circuit required * Differential or single analog Input * External amplitude range control * Voltage controlled regulator included. QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO ILE DLE fclk(max) PARAMETER analog supply voltage digital supply voltage output supply voltage analog supply current digital supply current output supply current integral non-linearity differential non-linearity maximum clock frequency TDA8767H/1 TDA8767H/2 TDA8767H/3 Ptot total power dissipation 10 20 30 - - - - 335 - - - - fclk = 4 MHz; fi = 400 kHz fclk = 4 MHz; fi = 400 kHz fclk = 4 MHz; fi = 400 kHz; no missing codes CONDITIONS MIN. 4.75 4.75 3.0 - - - - - TYP. 5.0 5.0 3.3 40 22 3.2 3.0 0.6 GENERAL DESCRIPTION APPLICATIONS
TDA8767
* High-speed analog-to-digital conversion for: - Video signal digitizing - High Definition TV (HDTV) - Imaging (camera, scanner) - Medical imaging - Telecommunication - Base-station receiver.
The TDA8767 is a bipolar 12-bit Analog-to-Digital Converter (ADC) for imaging or other applications. It converts the analog input signal into 12-bit binary coded digital words at a maximum sampling rate of 30 MHz. All digital inputs and outputs are CMOS compatible.
MAX. 5.25 5.25 5.25 tbf tbf tbf 4.0 1
UNIT V V V mA mA mA LSB LSB
MHz MHz MHz mW
1999 Feb 16
2
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
ORDERING INFORMATION TYPE NUMBER TDA8767H/1 TDA8767H/2 TDA8767H/3 BLOCK DIAGRAM QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm SOT307-2 PACKAGE NAME DESCRIPTION VERSION
TDA8767
SAMPLING FREQUENCY (MHz) 10 20 30
handbook, full pagewidth
VCCA1 VCCA2 VCCA3 VCCA4 2 9 3 41
CLK 36
VCCD1 VCCD2 37 15
TC 18
OE 19 21 D11
CLOCK DRIVER
MSB 22 D10 23 D9 24 D8 25 D7
TDA8767
Vref 11
AMP CMOS OUTPUTS VI VI 42 43 sampleand-hold SH 39 ANALOG-TO-DIGITAL CONVERTER LATCHES
26 D6 27 D5 28 D4 29 D3 30 D2 31 D1 32 D0 33 LSB VCCO data outputs
IN-RANGE LATCH
CMOS OUTPUT
20
IR
44
10
4
40
38
17
34
MBH142
AGND1
AGND2
AGND3
AGND4
DGND1
DGND2
OGND
analog ground
digital ground
Fig.1 Block diagram.
1999 Feb 16
3
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
PINNING SYMBOL n.c. VCCA1 VCCA3 AGND3 n.c. n.c. n.c. n.c. VCCA2 AGND2 Vref n.c. n.c. n.c. VCCD2 n.c. DGND2 TC OE IR D11 D10 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 DESCRIPTION not connected analog supply voltage 1 (+5 V) analog supply voltage 3 (+5 V) analog ground 3 not connected not connected not connected not connected analog supply voltage 2 (+5 V) analog ground 2 reference voltage not connected not connected not connected digital supply voltage 2 (+5 V) not connected digital ground 2 output two's complement output enable input (CMOS level; active LOW) in-range output data output; bit 11 (MSB) data output; bit 10 AGND4 VCCA4 VI VI AGND1 40 41 42 43 44 SYMBOL D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 VCCO OGND n.c. CLK VCCD1 DGND1 SH PIN 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
TDA8767
DESCRIPTION data output; bit 9 data output; bit 8 data output; bit 7 data output; bit 6 data output; bit 5 data output; bit 4 data output; bit 3 data output; bit 2 data output; bit 1 data output; bit 0 (LSB) output supply voltage (3 to 5.25 V) output ground not connected clock input digital supply voltage 1 (+5 V) digital ground 1 sample-and-hold enable input (CMOS level; active HIGH) analog ground 4 analog supply voltage 4 (+5 V) complementary analog input voltage analog input voltage analog ground 1
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
TDA8767
38 DGND1
44 AGND1
40 AGND4
34 OGND
handbook, full pagewidth
37 VCCD1
41 VCCA4
36 CLK
35 n.c.
39 SH
43 VI
42 VI
n.c. VCCA1 VCCA3 AGND3 n.c. n.c. n.c. n.c. VCCA2
1 2 3 4 5 6 7 8 9
33 VCCO 32 D0 31 D1 30 D2 29 D3
TDA8767
28 D4 27 D5 26 D6 25 D7 24 D8 23 D9
AGND2 10 Vref 11 n.c. 12 n.c. 13 n.c. 14 VCCD2 15 n.c. 16 DGND2 17 TC 18 OE 19 IR 20 D11 21 D10 22
MBH143
Fig.2 Pin configuration.
1999 Feb 16
5
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCO VCC PARAMETER analog supply voltage digital supply voltage output supply voltage supply voltage difference VCCA - VCCD VCCO - VCCD VCCA - VCCO VI Vi(p-p) IO Tstg Tamb Tj Note input voltage input voltage for differential clock drive (peak-to-peak value) output current storage temperature operating ambient temperature junction temperature referenced to AGND -1.0 -1.0 -1.0 0.3 - - -55 0 - +1.0 +4.0 +4.0 note 1 note 1 note 1 CONDITIONS MIN. -0.3 -0.3 -0.3
TDA8767
MAX. +7.0 +7.0 +7.0 V V V V V V V V
UNIT
VCCA VCCD 10 +150 70 +150
mA C C C
1. The supply voltages VCCA, VCCD and VCCO may have any value between -0.3 V and +7.0 V provided that the supply voltage differences VCC are respected. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE (TYP.) 75 UNIT K/W
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
TDA8767
CHARACTERISTICS VCCA = V2 to V44, V9 to V10, V3 to V4 and V41 to V40 = 4.75 to 5.25 V; VCCD = V37 to V38 and V15 to V17 = 4.75 to 5.25 V; VCCO = V33 to V34 = 3.0 to 5.25 V; AGND and DGND shorted together; Tamb = 0 to +70 C; typical values measured at VCCA = VCCD = 5 V and VCCO = 3.3 V; Vi(p-p) - Vi(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 C; unless otherwise specified. SYMBOL Supply VCCA VCCD VCCO ICCA ICCD ICCO Inputs CLK (REFERENCED TO DGND) VIL VIH IIL IIH Zi Ci VIL VIH IIL IIH IIL IIH Zi Ci Vios(d) LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current input impedance input capacitance Vclk = 0.3VCCD Vclk = 0.7VCCD Vclk = VCCD fclk = 30 MHz fclk = 30 MHz 0 2.0 -400 - - - - 0 2.0 VIL = 0.3VCCD VIH = 0.7VCCD Vi = Vi Vi = Vi fi = 4.43 MHz fi = 4.43 MHz VI = VI; output code 2047 VCCA = 5 V VCCA = 4.75 V VCCA = 5.25 V Vios(s) input offset voltage in single mode VI = Vios(s); output code 2047 VCCA = 5 V VCCA = 4.75 V VCCA = 5.25 V tbf tbf tbf 2.5 2.25 2.75 tbf tbf tbf V V V tbf tbf tbf 2.5 2.25 2.75 tbf tbf tbf V V V -400 - - - - - - - - - - 2 2 - - - - 10 10 10 2 0.8 VCCD - 100 300 - - 0.8 VCCD - 20 - - - - V V A A A k pF analog supply voltage digital supply voltage output supply voltage analog supply current digital supply current output supply current fclk = 20 MHz; fi = 4.43 MHz 4.75 4.75 3.0 - - - 5.0 5.0 3.3 40 22 12 5.25 5.25 5.25 tbf tbf tbf V V V mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
TC; SH AND OE (REFERENCED TO DGND); see Tables 3 and 4 LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current V V A A A A k pF
VI AND VI (REFERENCED TO AGND; see Tables 1 AND 2); Vref = VCCA - 2 V LOW-level input current HIGH-level input current input impedance input capacitance input offset voltage in differential mode
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA8767
MAX.
UNIT
Voltage controlled regulator input Vref (referenced to VCCA) Vref(FS) full scale fixed voltage VCCA = 5 V differential mode single mode; Vi = 2.5 V - - - - 3.175 2.0 2.0 10 - - - - V V V A Vi(p-p) - Vi(p-p) input voltage amplitude (peak-to-peak value) Iref input current at Vref
Outputs (referenced to DGND) DIGITAL OUTPUTS D11 TO D0 AND IR (REFERENCED TO DGND) VOL VOH IO LOW-level output voltage HIGH-level output voltage output current in 3-state IOL = 2 mA IOH = -0.4 mA 0.5 V < VO < VCCO 0 VCCO - 0.5 -20 - - - 0.5 VCCD +20 V V A
Switching characteristics CLOCK FREQUENCY fclk (see Fig.3) fclk(min) fclk(max) minimum clock frequency maximum clock frequency TDA8767H/1 TDA8767H/2 TDA8767H/3 tCPH tCPL clock pulse width HIGH clock pulse width LOW 10 20 30 8.5 8.5 - - - - - - - - - - MHz MHz MHz ns ns SH = HIGH SH = LOW - - - - 1 1 MHz kHz
Analog signal processing; 50% clock duty factor; Vi - Vi = 2.0 V; Vref = VCCA - 2 V; see Table 1 LINEARITY ILE DLE OFER integral non-linearity differential non-linearity offset error fclk = 4 MHz; ramp input fclk = 4 MHz; ramp input; no missing codes VCCA = VCCD = VCCO = 5 V; Tamb = 25 C; Vi = Vi; output code = 2047 VCCA = VCCD = VCCO = 5 V; Tamb = 25 C; Vi - Vi = 2.0 V -1 dB -3 dB tSTLH tSTHL HARMONICS THD total harmonic distortion fclk = 30 MHz; fi = 4.43 MHz; note 2 8 - -64 - dB analog input settling time LOW-to-HIGH transition analog input settling time HICH-to-LOW transition full scale square wave; note 3 full scale square wave; note 3 - - tbf 3.0 0.6 - 4.0 1 tbf LSB LSB LSB
GER
gain error amplitude; spread from device to device
tbf
-
tbf
LSB
BANDWIDTH (fclk = 30 MHz); note 1 B analog bandwidth - - - - 9 18 tbf tbf - - - - MHz MHz ns ns
1999 Feb 16
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
SYMBOL SIGNAL-TO-NOISE RATIO S/N signal-to-noise ratio without harmonics; fclk = 30 MHz; fi = 4.43 MHz - 61 PARAMETER CONDITIONS MIN. TYP.
TDA8767
MAX. -
UNIT
dB
Timing (CL = 15 pF); note 4; see Fig.3 tds th td sampling delay time output hold time output delay time VCCO = 4.75 V VCCO = 3.15 V 3-state output delay times; see Fig.4 tdZH tdZL tdHZ tdLZ enable HIGH enable LOW disable HIGH disable LOW - - - - 14 16 16 14 18 20 20 18 ns ns ns ns - 8 - - - 12 15 2 - 15 18 ns ns ns ns
Notes to the characteristics 1. The -3 dB (or -1 dB) analog bandwidth is determined by the 3 dB (or 1 dB) reduction in the reconstructed output, the input being a full-scale sine wave. 2. THD (total harmonic distortion) is obtained with the addition of the first five harmonics: F THD = 20 log --------------------------------------------------------------------------------------------------------------2 2 2 2 2 (2nd) + (3rd) + (4th) + (5th) + (6th) F being the fundamental harmonic referenced at 0 dB for a full-scale sine wave input. 3. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square wave signal) in order to sample the signal and obtain correct output data (see Fig.5). 4. Output data acquisition: the output data is available after the maximum delay of td.
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
Table 1
TDA8767
Output coding with differential inputs (typical values to AGND); VI(p-p) - VI(p-p) = 2.0 V; Vref = VCCA - 2 V BINARY OUTPUTS TWO'S COMPLEMENT OUTPUTS D11 to D0 100000000000 1 0 0 0 0 0 0 0 0 0 00 100000000001 111111111111 011111111110 011111111111 011111111111
CODE underflow 0 1 2047 4094 4095 overflow Table 2
VI <2.0 2.0 - - 2.5 - - 3.0 >3.0
VI >3.0 3.0 - - 2.5 - - 2.0 <2.0
IR D11 to D0 0 1 1 1 1 1 0 000000000000 000000000000 0 0 0 0 0 0 0 0 0 0 01 011111111111 111111111110 111111111111 111111111111
Output coding with single input (typical values to AGND); VFS = 2.0 V (p-p); Vref = VCCA - 2 V BINARY OUTPUTS TWO'S COMPLEMENT OUTPUTS D11 to D0 100000000000 1 0 0 0 0 0 0 0 0 0 00 100000000001 111111111111 011111111110 011111111111 011111111111
CODE underflow 0 1 2047 4094 4095 overflow
VI <1.5 1.5 - - 2.5 - - 3.5 >3.5
IR D11 to D0 0 1 1 1 1 1 0 000000000000 000000000000 0 0 0 0 0 0 0 0 0 0 01 011111111111 111111111110 111111111111 111111111111
Table 3 Mode selection TC 0 1 X(1) Note 1. Where: X = don't care. Table 4 Sample-and-hold selection SH 1 0 active inactive; tracking mode SAMPLE-AND-HOLD OE 0 0 1 binary; active two's complement; active high impedance D0 to D11 and IR
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
TDA8767
handbook, full pagewidth
t CPL t CPH HIGH CLK 50 % LOW sample N sample N + 1 sample N + 2
Vl
t ds DATA D0 to D11 DATA N-2 DATA N-1 td
th HIGH DATA N DATA N+1
MBG855
50 % LOW
Fig.3 Timing diagram.
handbook, full pagewidth
V CCD OE 0V t dHZ HIGH 90 % output data t dLZ HIGH output data LOW 10 % TEST V CCD 3.3 k TDA8767 15 pF OE S1 t dLZ t dZL t dHZ t dZH S1 VCCD VCCD DGND DGND
MBH144
50 %
t dZH
50 % t dZL LOW
50 %
fOE = 100 kHz.
Fig.4 Timing diagram and test conditions of 3-state output delay time.
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
TDA8767
t STLH
handbook, full pagewidth
t STHL
code 1023 VI code 0 5 ns 5 ns 50 % 50 %
CLK
50 %
50 %
MBD875
2 ns
2 ns
Fig.5 Analog input settling time diagram.
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
APPLICATION INFORMATION
TDA8767
handbook, full pagewidth
5V 100 nF
SH mode
5V 100 nF
220 nF IN 100
1:1 100
VI VI CLK(1) n.c. VCCA R1
(2)
5V 100 nF 33 32 31 30 29 D0 (LSB) D1 D2 D3 D4 D5 D6 D7 D8 D9
n.c. 5V 100 nF
1 2 3 4
44 43 42 41 40 39 38 37 36 35 34
4.7 F
10 nF
R2 n.c. n.c. n.c. 100 nF 5V 100 nF Vref
(3)
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
TDA8767H
28 27 26 25 24 23
n.c.
MBH145
n.c.
n.c.
n.c.
n.c.
IR
5V 100 nF
D10 D11 (MSB) chip select input (OE) output format select (TC)
The analog, digital and output supplies should be separated and decoupled. (1) At power-up a high level clock must be provided within less than 1 s or a pull-up resistor must be connected between CLK and VCCD. (2) R1, and R2 must be determined in order to obtain a middle voltage of 2.5 V; see Table 1. To ensure a sufficient analog input stability, the minimum current into these resistors must be about 1 mA. (3) Vref must be decoupled to VCCA.
Fig.6 Application diagram (differential input mode).
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
TDA8767
handbook, full pagewidth
5V 100 nF
SH mode
5V 100 nF
220 nF IN 50
VI VI CLK(1) n.c. 50 50 n.c. 4.7 F 10 nF 5V 100 nF 1 2 3 4 n.c. n.c. n.c. 100 nF 5V 100 nF Vref
(3)
5V 100 nF 33 32 31 30 29 D0 (LSB) D1 D2 D3 D4 D5 D6 D7 D8 D9
R1 VCCA
(2)
44 43 42 41 40 39 38 37 36 35 34
R2
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
TDA8767H
28 27 26 25 24 23
n.c.
MBH146
n.c.
n.c.
n.c.
n.c.
IR
5V 100 nF
D10 D11 (MSB) chip select input OE output format select TC
The analog, digital and output supplies should be separated and decoupled. (1) At power-up a high level clock must be provided within less than 1 s or a pull-up resistor must be connected between CLK and VCCD. (2) R1, and R2 must be determined in order to obtain a voltage of 2.5 V on VI and VI; see Table 1. To ensure a sufficient analog input stability, the minimum current into these resistors must be about 1 mA. (3) Vref must be decoupled to VCCA.
Fig.7 Application diagram (single input mode).
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
PACKAGE OUTLINE QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
TDA8767
SOT307-2
c
y X
A 33 34 23 22 ZE
e E HE wM bp pin 1 index 44 1 bp D HD wM 11 ZD B vM B vMA 12 detail X A A2 (A 3) Lp L
A1
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.10 A1 0.25 0.05 A2 1.85 1.65 A3 0.25 bp 0.40 0.20 c 0.25 0.14 D (1) 10.1 9.9 E (1) 10.1 9.9 e 0.8 HD 12.9 12.3 HE 12.9 12.3 L 1.3 Lp 0.95 0.55 v 0.15 w 0.15 y 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 10 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT307-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-08-01
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
TDA8767
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP PLCC(3), SO, SOJ not suitable suitable(2) suitable not recommended(3)(4) not recommended(5) suitable suitable suitable suitable suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes
TDA8767
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
NOTES
TDA8767
1999 Feb 16
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Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital Converter (ADC)
NOTES
TDA8767
1999 Feb 16
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 489 4339/4239, Fax. +30 1 481 4240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777 Internet: http://www.semiconductors.philips.com
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
SCA62
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/750/03/pp20
Date of release: 1999 Feb 16
Document order number:
9397 750 04713


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